Job Description

Role: Analog Layout Engineer

Location: Fremont, CA (Onsite)

Duration: Full Time

Responsibilities:

• Lead a team of layout engineers to produce complex analog and mixed-signal blocks with high-quality layout
• Collaborate with project managers and design engineers to understand project requirements
• Drive critical floor-planning decisions and key layout methodology
• Ensure that all designs meet project requirements and adhere to design guidelines
• Review and approve final layout designs for production
• Stay up-to-date with industry trends and advancements in design software and techniques
• Attend project meetings, presentations, and other events as needed

Requirements:

• B.S. EE and 8+ years of relevant industry experience or equivalent
• Experience in analog and mixed-signal layout design of deep submicron CMOS circuits and recent experience on advance nodes
• Proficiency in industry-standard design software, such as Cadence Virtuoso, Calibre DRC, LVS
• Strong understanding of layout design principles and best practices
• Excellent communication, collaboration, and leadership skills
• Ability to manage multiple projects simultaneously while maintaining attention to detail
• Demonstrated ability to work independently and as part of a team
• Strong problem-solving and decision-making skills
• Experience in one or more of the following areas considered a strong plus:
• Hands-on production experience with key memory blocks such as sense amplifier, charge pump, read/write assist circuit, PVT tracker, power gating etc
• Familiar with memory controller or memory interface
• Experience with emerging non-volatile memory

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